Set associative data cache having multiple ways frequently are used in processing systems to cache data from memory for use during instruction execution. In an effort to reduce power consumption, techniques have been developed that implement a most recently used (MRU) policy whereby the most recently used way of the cache is read in parallel with the cache tags in response to a cache read request. If the most recently used way is identified as having the requested data, the cache access terminates and the requested data is provided to the execution pipeline. However, if the most recently used way does not have the requested data, the execution pipeline stalls and the cache proceeds with a normal cache lookup based on an analysis of the cache tag array. If there is a cache hit, the cache is read with typically at least a two-clock stall that occurs because the tag analysis results typically are not available in time to issue the cache read for the clock edge following the read of the most recently used way. If there is a cache miss, the processing system continues to stall while a memory other than the case is accessed to obtain the requested data. This conventional technique generally results in reduced power consumption compared to other techniques that generally power all ways of the cache during a cache access because only one way is powered if there is a hit on the most recently used way or only two ways are powered if there is a cache hit on the non-most recently used way. However, as discussed above, a miss on the most recently used way typically results in at least a two clock delay that frequently would not occur in other conventional techniques. Accordingly, an improved technique for processing cache read requests would be advantageous.